In recent years, as the levels of integration and capacity of large scale integrated circuits (LSIs) have increased, there has been a need to continue to reduce the width of the circuit patterns of semiconductor devices. Semiconductor devices are manufactured by a reduced projection exposure apparatus called a “stepper” using original artwork patterns with a circuit pattern formed thereon, these are called masks or reticles (hereinafter referred to collectively as masks). Here, a wavelength of deep ultraviolet rays used for the transfer of a pattern is 193 nm, but the size of a pattern to be transferred is shorter than the wavelength. Therefore, the complexity of the lithography technique is also accelerated. Further, the degree of freedom to perform a design change to a different mask pattern for each product is also demanded for mass production of LSIs. In view of these circumstances, an electron beam lithography technique implemented in an electron beam writing apparatus is used when original artwork patterns are formed on a mask.
Electron beam lithography inherently provides a superior resolution, since it uses electron beams, which are a type of charged particle beam. This technology is also advantageous in that great depth of focus is obtained, which enables dimensional variations to be reduced even when a large step feature is encountered. Therefore, the electron beam lithography technique is used not only in manufacturing masks but also when patterns are written directly on a wafer. For example, the technology has been applied to the development of state-of-the-art devices typified by DRAM (dynamic random access memory), as well as to the production of some ASICs.
Incidentally, since the cost to manufacture LSIs is very high, an increase in yield is required to make the manufacturing economically feasible. Therefore, various measures have been adopted in order to increase the yield. In particular, since pattern defects of masks are a large factor in causing yield reduction, the pattern detects are required to be detected accurately in the mask manufacturing process.
However, the dimensions of the patterns for LSI devices, as typified by 1-gigabit class DRAMs, are about to be scaled down from the order of submicrons to the order of nanometers. Therefore, the size of pattern defects to be detected on the mask is very small. As a result, high inspection accuracy is required of inspection systems for detecting defects of masks used in LSI manufacture.
There are two known mask defect detecting methods: the die-to-die inspection method and the die-to-database inspection method. Both the inspections are configured so as to compare an optical image of a sample to be inspected with a reference image serving as an example to detect a defect. For example, in the die-to-database inspection, write data (design pattern data) is inputted into an inspection system and design image data (reference image) serving as the reference image is generated based upon the write data. Measurement data (optical image) obtained by photographing a pattern is compared with the design image data (reference image). Incidentally, the write data is obtained by converting CAD (Computer Aided Design) data that has been pattern-designed into a format, which can be inputted into the inspection system.
The die-to-database inspection method is specifically disclosed in Japanese Laid-Open Patent Publication No. 2008-112178. In this document light is emitted from a light source, and the mask to be inspected is irradiated with this light through an optical unit. The mask is mounted on a stage, and this stage is moved so that the emitted beam of light scans the surface of the mask. Light transmitted through or reflected from the mask reaches an image sensor forming an image thereon. The optical image thus formed on the image sensor is sent to a comparing unit as measurement data. The comparing unit compares the measurement data with design image data in accordance with an appropriate algorithm, and if they are not identical, the mask is determined to have a defect.
As described above, according to the decrease in dimensions of a pattern on a mask, a size of a defect to be detected becomes smaller. Therefore, the inspection system is required to have an optical unit with a high magnification, and the time for inspection becomes protracted. Therefore, due to thermal drift of a mask or fluctuation of air flow inside the inspection system caused by long-time irradiation of an inspection light to the mask, measurement errors of a position measuring system caused by various heat sources in the inspection system and the like, there is a problem in that fluctuation of the position of the pattern obtained from the inspection result occurs. In view of further advancement of decreases in pattern dimensions, such a position fluctuation must be corrected.
The present invention has been conceived in view of the above problem. Therefore, an object of the invention is to provide a apparatus and method which can reduce position errors occurring in the inspection process.
Other challenges and advantages of the present invention are apparent from the following description.